Struct cortex_m::peripheral::MPU
[−]
[src]
pub struct MPU { pub _type: RO<u32>, pub ctrl: RW<u32>, pub rnr: RW<u32>, pub rbar: RW<u32>, pub rasr: RW<u32>, pub rbar_a1: RW<u32>, pub rsar_a1: RW<u32>, pub rbar_a2: RW<u32>, pub rsar_a2: RW<u32>, pub rbar_a3: RW<u32>, pub rsar_a3: RW<u32>, }
MPU register block
Fields
_type: RO<u32>
Type
ctrl: RW<u32>
Control
rnr: RW<u32>
Region Number
rbar: RW<u32>
Region Base Address
rasr: RW<u32>
Region Attribute and Size
rbar_a1: RW<u32>
Alias 1 of RBAR
rsar_a1: RW<u32>
Alias 1 of RSAR
rbar_a2: RW<u32>
Alias 2 of RBAR
rsar_a2: RW<u32>
Alias 2 of RSAR
rbar_a3: RW<u32>
Alias 3 of RBAR
rsar_a3: RW<u32>
Alias 3 of RSAR