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use volatile_register::{RO, RW};
use peripheral::NVIC;
use interrupt::Nr;
#[repr(C)]
pub struct RegisterBlock {
pub iser: [RW<u32>; 16],
reserved0: [u32; 16],
pub icer: [RW<u32>; 16],
reserved1: [u32; 16],
pub ispr: [RW<u32>; 16],
reserved2: [u32; 16],
pub icpr: [RW<u32>; 16],
reserved3: [u32; 16],
pub iabr: [RO<u32>; 16],
reserved4: [u32; 48],
#[cfg(not(armv6m))]
pub ipr: [RW<u8>; 496],
#[cfg(armv6m)]
pub ipr: [RW<u32>; 8],
}
impl NVIC {
pub fn clear_pending<I>(&mut self, interrupt: I)
where
I: Nr,
{
let nr = interrupt.nr();
unsafe { self.icpr[usize::from(nr / 32)].write(1 << (nr % 32)) }
}
pub fn disable<I>(&mut self, interrupt: I)
where
I: Nr,
{
let nr = interrupt.nr();
unsafe { self.icer[usize::from(nr / 32)].write(1 << (nr % 32)) }
}
pub fn enable<I>(&mut self, interrupt: I)
where
I: Nr,
{
let nr = interrupt.nr();
unsafe { self.iser[usize::from(nr / 32)].write(1 << (nr % 32)) }
}
pub fn get_priority<I>(interrupt: I) -> u8
where
I: Nr,
{
#[cfg(not(armv6m))]
{
let nr = interrupt.nr();
unsafe { (*Self::ptr()).ipr[usize::from(nr)].read() }
}
#[cfg(armv6m)]
{
let ipr_n = unsafe { (*Self::ptr()).ipr[Self::ipr_index(&interrupt)].read() };
let prio = (ipr_n >> Self::ipr_shift(&interrupt)) & 0x000000ff;
prio as u8
}
}
pub fn is_active<I>(interrupt: I) -> bool
where
I: Nr,
{
let nr = interrupt.nr();
let mask = 1 << (nr % 32);
unsafe { ((*Self::ptr()).iabr[usize::from(nr / 32)].read() & mask) == mask }
}
pub fn is_enabled<I>(interrupt: I) -> bool
where
I: Nr,
{
let nr = interrupt.nr();
let mask = 1 << (nr % 32);
unsafe { ((*Self::ptr()).iser[usize::from(nr / 32)].read() & mask) == mask }
}
pub fn is_pending<I>(interrupt: I) -> bool
where
I: Nr,
{
let nr = interrupt.nr();
let mask = 1 << (nr % 32);
unsafe { ((*Self::ptr()).ispr[usize::from(nr / 32)].read() & mask) == mask }
}
pub fn set_pending<I>(&mut self, interrupt: I)
where
I: Nr,
{
let nr = interrupt.nr();
unsafe { self.ispr[usize::from(nr / 32)].write(1 << (nr % 32)) }
}
pub unsafe fn set_priority<I>(&mut self, interrupt: I, prio: u8)
where
I: Nr,
{
#[cfg(not(armv6m))]
{
let nr = interrupt.nr();
self.ipr[usize::from(nr)].write(prio)
}
#[cfg(armv6m)]
{
self.ipr[Self::ipr_index(&interrupt)].modify(|value| {
let mask = 0x000000ff << Self::ipr_shift(&interrupt);
let prio = u32::from(prio) << Self::ipr_shift(&interrupt);
(value & !mask) | prio
})
}
}
#[cfg(armv6m)]
fn ipr_index<I>(interrupt: &I) -> usize
where
I: Nr,
{
usize::from(interrupt.nr()) / 4
}
#[cfg(armv6m)]
fn ipr_shift<I>(interrupt: &I) -> usize
where
I: Nr,
{
(usize::from(interrupt.nr()) % 4) * 8
}
}