1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
use cast::{u16, u32};
use cortex_m::peripheral::SYST;
use cortex_m::peripheral::syst::SystClkSource;
use hal::timer::{CountDown, Periodic};
use nb;
use stm32f103xx::{TIM2, TIM3, TIM4};
use rcc::{APB1, Clocks};
use time::Hertz;
pub enum Event {
Update,
}
pub struct Timer<TIM> {
tim: TIM,
clocks: Clocks,
}
impl Timer<SYST> {
pub fn syst<T>(mut syst: SYST, timeout: T, clocks: Clocks) -> Self
where
T: Into<Hertz>,
{
syst.set_clock_source(SystClkSource::Core);
let mut timer = Timer { tim: syst, clocks };
timer.start(timeout);
timer
}
pub fn listen(&mut self, event: Event) {
match event {
Event::Update => self.tim.enable_interrupt(),
}
}
pub fn unlisten(&mut self, event: Event) {
match event {
Event::Update => self.tim.disable_interrupt(),
}
}
}
impl CountDown for Timer<SYST> {
type Time = Hertz;
fn start<T>(&mut self, timeout: T)
where
T: Into<Hertz>,
{
let rvr = self.clocks.sysclk().0 / timeout.into().0 - 1;
assert!(rvr < (1 << 24));
self.tim.set_reload(rvr);
self.tim.clear_current();
self.tim.enable_counter();
}
fn wait(&mut self) -> nb::Result<(), !> {
if self.tim.has_wrapped() {
Ok(())
} else {
Err(nb::Error::WouldBlock)
}
}
}
impl Periodic for Timer<SYST> {}
macro_rules! hal {
($($TIMX:ident: ($timX:ident, $timXen:ident, $timXrst:ident),)+) => {
$(
impl Timer<$TIMX> {
pub fn $timX<T>(tim: $TIMX, timeout: T, clocks: Clocks, apb1: &mut APB1) -> Self
where
T: Into<Hertz>,
{
apb1.enr().modify(|_, w| w.$timXen().set_bit());
apb1.rstr().modify(|_, w| w.$timXrst().set_bit());
apb1.rstr().modify(|_, w| w.$timXrst().clear_bit());
let mut timer = Timer { clocks, tim };
timer.start(timeout);
timer
}
pub fn listen(&mut self, event: Event) {
match event {
Event::Update => self.tim.dier.write(|w| w.uie().set_bit()),
}
}
pub fn unlisten(&mut self, event: Event) {
match event {
Event::Update => self.tim.dier.write(|w| w.uie().clear_bit()),
}
}
}
impl CountDown for Timer<$TIMX> {
type Time = Hertz;
fn start<T>(&mut self, timeout: T)
where
T: Into<Hertz>,
{
self.tim.cr1.modify(|_, w| w.cen().clear_bit());
self.tim.cnt.reset();
let frequency = timeout.into().0;
let ticks = self.clocks.pclk1().0 * if self.clocks.ppre1() == 1 { 1 } else { 2 }
/ frequency;
let psc = u16((ticks - 1) / (1 << 16)).unwrap();
self.tim.psc.write(|w| w.psc().bits(psc));
let arr = u16(ticks / u32(psc + 1)).unwrap();
self.tim.arr.write(|w| unsafe { w.bits(u32(arr)) });
self.tim.cr1.modify(|_, w| w.cen().set_bit());
}
fn wait(&mut self) -> nb::Result<(), !> {
if self.tim.sr.read().uif().bit_is_clear() {
Err(nb::Error::WouldBlock)
} else {
self.tim.sr.modify(|_, w| w.uif().clear_bit());
Ok(())
}
}
}
impl Periodic for Timer<$TIMX> {}
)+
}
}
hal! {
TIM2: (tim2, tim2en, tim2rst),
TIM3: (tim3, tim3en, tim3rst),
TIM4: (tim4, tim4en, tim3rst),
}