Module stm32f103xx::tim1
[−]
[src]
Advanced timer
Modules
arr |
auto-reload register |
bdtr |
break and dead-time register |
ccer |
capture/compare enable register |
ccmr1_input |
capture/compare mode register 1 (input mode) |
ccmr1_output |
capture/compare mode register (output mode) |
ccmr2_input |
capture/compare mode register 2 (input mode) |
ccmr2_output |
capture/compare mode register (output mode) |
ccr1 |
capture/compare register 1 |
ccr2 |
capture/compare register 2 |
ccr3 |
capture/compare register 3 |
ccr4 |
capture/compare register 4 |
cnt |
counter |
cr1 |
control register 1 |
cr2 |
control register 2 |
dcr |
DMA control register |
dier |
DMA/Interrupt enable register |
dmar |
DMA address for full transfer |
egr |
event generation register |
psc |
prescaler |
rcr |
repetition counter register |
smcr |
slave mode control register |
sr |
status register |
Structs
ARR |
auto-reload register |
BDTR |
break and dead-time register |
CCER |
capture/compare enable register |
CCMR1_INPUT |
capture/compare mode register 1 (input mode) |
CCMR1_OUTPUT |
capture/compare mode register (output mode) |
CCMR2_INPUT |
capture/compare mode register 2 (input mode) |
CCMR2_OUTPUT |
capture/compare mode register (output mode) |
CCR1 |
capture/compare register 1 |
CCR2 |
capture/compare register 2 |
CCR3 |
capture/compare register 3 |
CCR4 |
capture/compare register 4 |
CNT |
counter |
CR1 |
control register 1 |
CR2 |
control register 2 |
DCR |
DMA control register |
DIER |
DMA/Interrupt enable register |
DMAR |
DMA address for full transfer |
EGR |
event generation register |
PSC |
prescaler |
RCR |
repetition counter register |
RegisterBlock |
Register block |
SMCR |
slave mode control register |
SR |
status register |