[−][src]Struct cortex_m::peripheral::DCB

pub struct DCB { /* fields omitted */ }

Debug Control Block

Methods

impl DCB[src]

pub fn enable_trace(&mut self)[src]

Enables TRACE. This is for example required by the peripheral::DWT cycle counter to work properly. As by STM documentation, this flag is not reset on soft-reset, only on power reset.

pub fn disable_trace(&mut self)[src]

Disables TRACE. See DCB::enable_trace() for more details

pub fn is_debugger_attached() -> bool[src]

Is there a debugger attached? (see note)

Note: This function is reported not to work on Cortex-M0 devices. Per the ARM v6-M Architecture Reference Manual, "Access to the DHCSR from software running on the processor is IMPLEMENTATION DEFINED". Indeed, from the Cortex-M0+ r0p1 Technical Reference Manual, "Note Software cannot access the debug registers."

impl DCB[src]

pub fn ptr() -> *const RegisterBlock[src]

Returns a pointer to the register block

Trait Implementations

impl Send for DCB[src]

impl Deref for DCB[src]

type Target = RegisterBlock

The resulting type after dereferencing.

Auto Trait Implementations

impl !Sync for DCB

Blanket Implementations

impl<T> From<T> for T[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Same<T> for T[src]

type Output = T

Should always be Self