Struct stm32f103xx::afio::mapr::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn spi1_remap(&self) -> SPI1_REMAPR[src]
Bit 0 - SPI1 remapping
pub fn i2c1_remap(&self) -> I2C1_REMAPR[src]
Bit 1 - I2C1 remapping
pub fn usart1_remap(&self) -> USART1_REMAPR[src]
Bit 2 - USART1 remapping
pub fn usart2_remap(&self) -> USART2_REMAPR[src]
Bit 3 - USART2 remapping
pub fn usart3_remap(&self) -> USART3_REMAPR[src]
Bits 4:5 - USART3 remapping
pub fn tim1_remap(&self) -> TIM1_REMAPR[src]
Bits 6:7 - TIM1 remapping
pub fn tim2_remap(&self) -> TIM2_REMAPR[src]
Bits 8:9 - TIM2 remapping
pub fn tim3_remap(&self) -> TIM3_REMAPR[src]
Bits 10:11 - TIM3 remapping
pub fn tim4_remap(&self) -> TIM4_REMAPR[src]
Bit 12 - TIM4 remapping
pub fn can_remap(&self) -> CAN_REMAPR[src]
Bits 13:14 - CAN1 remapping
pub fn pd01_remap(&self) -> PD01_REMAPR[src]
Bit 15 - Port D0/Port D1 mapping on OSCIN/OSCOUT
pub fn tim5ch4_iremap(&self) -> TIM5CH4_IREMAPR[src]
Bit 16 - Set and cleared by software
pub fn adc1_etrginj_remap(&self) -> ADC1_ETRGINJ_REMAPR[src]
Bit 17 - ADC 1 External trigger injected conversion remapping
pub fn adc1_etrgreg_remap(&self) -> ADC1_ETRGREG_REMAPR[src]
Bit 18 - ADC 1 external trigger regular conversion remapping
pub fn adc2_etrginj_remap(&self) -> ADC2_ETRGINJ_REMAPR[src]
Bit 19 - ADC 2 external trigger injected conversion remapping
pub fn adc2_etrgreg_remap(&self) -> ADC2_ETRGREG_REMAPR[src]
Bit 20 - ADC 2 external trigger regular conversion remapping