Struct stm32f103xx::NVIC
[−]
[src]
pub struct NVIC { /* fields omitted */ }Nested Vector Interrupt Controller
Methods
impl NVIC[src]
pub fn clear_pending<I>(&mut self, interrupt: I) where
I: Nr, [src]
I: Nr,
Clears interrupt's pending state
pub fn disable<I>(&mut self, interrupt: I) where
I: Nr, [src]
I: Nr,
Disables interrupt
pub fn enable<I>(&mut self, interrupt: I) where
I: Nr, [src]
I: Nr,
Enables interrupt
pub fn get_priority<I>(interrupt: I) -> u8 where
I: Nr, [src]
I: Nr,
Returns the NVIC priority of interrupt
NOTE NVIC encodes priority in the highest bits of a byte so values like 1 and 2 map
to the same priority. Also for NVIC priorities, a lower value (e.g. 16) has higher
priority (urgency) than a larger value (e.g. 32).
pub fn is_active<I>(interrupt: I) -> bool where
I: Nr, [src]
I: Nr,
Is interrupt active or pre-empted and stacked
pub fn is_enabled<I>(interrupt: I) -> bool where
I: Nr, [src]
I: Nr,
Checks if interrupt is enabled
pub fn is_pending<I>(interrupt: I) -> bool where
I: Nr, [src]
I: Nr,
Checks if interrupt is pending
pub fn set_pending<I>(&mut self, interrupt: I) where
I: Nr, [src]
I: Nr,
Forces interrupt into pending state
pub unsafe fn set_priority<I>(&mut self, interrupt: I, prio: u8) where
I: Nr, [src]
I: Nr,
Sets the "priority" of interrupt to prio
NOTE See get_priority method for an explanation
of how NVIC priorities work.
On ARMv6-M, updating an interrupt priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single atomic write operation.
impl NVIC[src]
pub fn ptr() -> *const RegisterBlock[src]
Returns a pointer to the register block
Trait Implementations
impl Deref for NVIC[src]
type Target = RegisterBlock
The resulting type after dereferencing.
fn deref(&self) -> &<NVIC as Deref>::Target[src]
Dereferences the value.