Struct cortex_m::peripheral::NVIC

#[repr(C)]
pub struct NVIC {
    pub iser: [RW<u32>; 8],
    pub icer: [RW<u32>; 8],
    pub ispr: [RW<u32>; 8],
    pub icpr: [RW<u32>; 8],
    pub iabr: [RO<u32>; 8],
    pub ipr: [RW<u8>; 240],
    // some fields omitted
}

NVIC register block

Fields

iser: [RW<u32>; 8]

Interrupt Set-Enable

icer: [RW<u32>; 8]

Interrupt Clear-Enable

ispr: [RW<u32>; 8]

Interrupt Set-Pending

icpr: [RW<u32>; 8]

Interrupt Clear-Pending

iabr: [RO<u32>; 8]

Interrupt Active Bit

ipr: [RW<u8>; 240]

Interrupt Priority

Methods

impl NVIC

pub fn clear_pending<I>(&self, interrupt: I) where
    I: Nr, 

Clears interrupt's pending state

pub fn disable<I>(&self, interrupt: I) where
    I: Nr, 

Disables interrupt

pub fn enable<I>(&self, interrupt: I) where
    I: Nr, 

Enables interrupt

pub fn get_priority<I>(&self, interrupt: I) -> u8 where
    I: Nr, 

Gets the "priority" of interrupt

NOTE NVIC encodes priority in the highest bits of a byte so values like 1 and 2 have the same priority. Also for NVIC priorities, a lower value (e.g. 16) has higher priority than a larger value (e.g. 32).

pub fn is_active<I>(&self, interrupt: I) -> bool where
    I: Nr, 

Is interrupt active or pre-empted and stacked

pub fn is_enabled<I>(&self, interrupt: I) -> bool where
    I: Nr, 

Checks if interrupt is enabled

pub fn is_pending<I>(&self, interrupt: I) -> bool where
    I: Nr, 

Checks if interrupt is pending

pub fn set_pending<I>(&self, interrupt: I) where
    I: Nr, 

Forces interrupt into pending state

pub unsafe fn set_priority<I>(&self, interrupt: I, prio: u8) where
    I: Nr, 

Sets the "priority" of interrupt to prio

NOTE See get_priority method for an explanation of how NVIC priorities work.