Struct cortex_m::peripheral::SCB
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#[repr(C)]pub struct SCB { pub icsr: RW<u32>, pub vtor: RW<u32>, pub aircr: RW<u32>, pub scr: RW<u32>, pub ccr: RW<u32>, pub shpr: [RW<u8>; 12], pub shpcrs: RW<u32>, pub cfsr: RW<u32>, pub hfsr: RW<u32>, pub dfsr: RW<u32>, pub mmar: RW<u32>, pub bfar: RW<u32>, pub afsr: RW<u32>, pub cpacr: RW<u32>, // some fields omitted }
SCB register block
Fields
icsr: RW<u32>
Interrupt Control and State
vtor: RW<u32>
Vector Table Offset
aircr: RW<u32>
Application Interrupt and Reset Control
scr: RW<u32>
System Control
ccr: RW<u32>
Configuration and Control
shpr: [RW<u8>; 12]
System Handler Priority
shpcrs: RW<u32>
System Handler Control and State
cfsr: RW<u32>
Configurable Fault Status
hfsr: RW<u32>
HardFault Status
dfsr: RW<u32>
Debug Fault Status
mmar: RW<u32>
MemManage Fault Address
bfar: RW<u32>
BusFault Address
afsr: RW<u32>
Auxiliary Fault Status
cpacr: RW<u32>
Coprocessor Access Control
Methods
impl SCB
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pub fn enable_icache(&self)
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Enables I-Cache if currently disabled
pub fn disable_icache(&self)
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Disables I-Cache if currently enabled
pub fn icache_enabled(&self) -> bool
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Returns whether the I-Cache is currently enabled
pub fn invalidate_icache(&self)
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Invalidates I-Cache
pub fn enable_dcache(&self, cpuid: &CPUID)
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Enables D-cache if currently disabled
pub fn disable_dcache(&self, cpuid: &CPUID)
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Disables D-cache if currently enabled
pub fn dcache_enabled(&self) -> bool
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Returns whether the D-Cache is currently enabled
pub fn clean_dcache(&self, cpuid: &CPUID)
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Cleans D-cache
pub fn clean_invalidate_dcache(&self, cpuid: &CPUID)
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Cleans and invalidates D-cache
pub fn invalidate_dcache_by_address(&self, addr: usize, size: usize)
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Invalidates D-cache by address
addr
: the address to invalidate
size
: size of the memory block, in number of bytes
Invalidates cache starting from the lowest 32-byte aligned address represented by addr
,
in blocks of 32 bytes until at least size
bytes have been invalidated.
pub fn clean_dcache_by_address(&self, addr: usize, size: usize)
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Cleans D-cache by address
addr
: the address to clean
size
: size of the memory block, in number of bytes
Cleans cache starting from the lowest 32-byte aligned address represented by addr
,
in blocks of 32 bytes until at least size
bytes have been cleaned.
pub fn clean_invalidate_dcache_by_address(&self, addr: usize, size: usize)
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Cleans and invalidates D-cache by address
addr
: the address to clean and invalidate
size
: size of the memory block, in number of bytes
Cleans and invalidates cache starting from the lowest 32-byte aligned address represented
by addr
, in blocks of 32 bytes until at least size
bytes have been cleaned and
invalidated.